Self adaptive body biasing scheme for leakage power reduction in nanoscale CMOS circuit

Authors:
Jing Yang;Yong-bin Kim
Affiliations:
Northeastern University, Boston, MA, USA;Northeastern University, Boston, MA, USA
Venue:
Proceedings of the great lakes symposium on VLSI
Year:
2012

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Abstract

This paper presents techniques to determine the optimal reverse body bias (RBB) voltage to minimize leakage currents in modern nanoscale CMOS technology. The proposed self-adaptive RBB system finds the optimum reverse body bias voltage for minimal leakage power adaptively by comparing subthreshold leakage current (ISUBTH), gate tunneling leakage (IGATE), and band-to-band tunneling leakage currents (IBTBT) in standby mode. The proposed circuit has been designed and tested using 65nm bulk CMOS technology at 25ºC under a supply voltage of less than 1V. The optimal RBB was achieved at -0.372V with 1.2% error in the test case of the paper, and the simulation result shows that it is possible to reduce the total leakage current significantly as much as 86% of the total leakage using the proposed circuit techniques.