A denial-of-service resilient wireless NoC architecture

Authors:
Amlan Ganguly;Mohsin Yusuf Ahmed;Anuroop Vidapalapati
Affiliations:
Rochester Institute of Technology, Rochester, NY, USA;Rochester Institute of Technology, Rochester, NY, USA;Rochester Institute of Technology, Rochester, NY, USA
Venue:
Proceedings of the great lakes symposium on VLSI
Year:
2012

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Abstract

Wireless Network-on-Chip (NoC) architectures have emerged as an enabling solution to design scalable NoC fabrics for massive many-core chips. However, such massive levels of integration of Intellectual Property (IP) cores make the chips vulnerable to malicious intrusions from untrustworthy processes or vendors. Hence, resilience to various types of hardware security threats is imperative in future many-core chips. In this paper we develop a design methodology to increase the resilience of a wireless NoC to Denial-of-Service (DoS) attacks. We demonstrate that the proposed architecture can sustain higher data transfer rates at lower energy dissipation with the spread of DoS attacks compared to conventional mesh based NoCs.