A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Itoh-Tsujii Inversion in Standard Basis and Its Application in Cryptography and Codes
Designs, Codes and Cryptography
The Montgomery Inverse and Its Applications
IEEE Transactions on Computers
A Fast Implementation of Multiplicative Inversion Over GF(2^m )
ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume I - Volume 01
Cryptographic Algorithms on Reconfigurable Hardware (Signals and Communication Technology)
Cryptographic Algorithms on Reconfigurable Hardware (Signals and Communication Technology)
Parallel Itoh---Tsujii multiplicative inversion algorithm for a special class of trinomials
Designs, Codes and Cryptography
Power Attack Resistant Efficient FPGA Architecture for Karatsuba Multiplier
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Accelerating Itoh-Tsujii multiplicative inversion algorithm for FPGAs
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
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Among all finite field operations, finite field inversion is the most computationally intensive operation. Yet, it is an essential component of several public-key cryptographic algorithms such as elliptic curve cryptography. For hardware implementations over extended binary fields, the Itoh-Tsujii inversion algorithm (ITA) is the most efficient. In this paper we propose acceleration techniques for ITA on FPGA platforms. We first propose a generalization of the parallel ITA which uses exponentiation by 2^n and 2^n, where n=1. Parallel ITA has several drawbacks which limit its speed. We propose a novel technique supported with theoretical analysis to overcome the drawbacks. The technique reduces the critical delay of the ITA architecture without increasing the clock cycle requirement. Experimental results are presented to show that the proposed technique outperforms reported results.