Systematic serialisation of array-based architectures
Integration, the VLSI Journal - Special issue on algorithms and architectures
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FPCA '95 Proceedings of the seventh international conference on Functional programming languages and computer architecture
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This paper presents two classes of transformations for serialising an array of processors. The first serialises a heterogeneous array of size mk to one of size m. The second serialises an array from n to m components where m does not need to be a factor of n. Our transformations are expressed in the Ruby language, which provides a concise notation for capturing the serialised array and the boundary conditions; in particular many design constraints can be represented in the form of conjugate (Q-1; R; Q) or transposed conjugate ([Q,P]-1; R; [P;Q]) expressions. Design trade-offs in performance and resource requirements of various serialisation schemes are discussed.We illustrate our approach using several arithmetic and recursive filter designs, and their implementation using programmable hardware is outlined.