Demo Abstract: Model-Based Testing of Implantable Cardiac Devices
ICCPS '12 Proceedings of the 2012 IEEE/ACM Third International Conference on Cyber-Physical Systems
Modeling and verification of a dual chamber implantable pacemaker
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
A low complexity coordination architecture for networked supervisory medical systems
Proceedings of the ACM/IEEE 4th International Conference on Cyber-Physical Systems
Formal analysis of Fresenius infusion pump (FIP)
Proceedings of the ACM/IEEE 4th International Conference on Cyber-Physical Systems
Safety-critical medical device development using the UPP2SF model translation tool
ACM Transactions on Embedded Computing Systems (TECS)
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Model-Driven Design (MDD) of cyber-physical systems advocates for design procedures that start with formal modeling of the real-time system, followed by the model's verification at an early stage. The verified model must then be translated to a more detailed model for simulation-based testing and finally translated into executable code in a physical implementation. As later stages build on the same core model, it is essential that models used earlier in the pipeline are valid approximations of the more detailed models developed downstream. The focus of this effort is on the design and development of a model translation tool, UPP2SF, and how it integrates system modeling, verification, model-based WCET analysis, simulation, code generation and testing into an MDD based framework. UPP2SF facilitates automatic conversion of verified timed automata-based models (in UPPAAL) to models that may be simulated and tested (in Simulink/State flow). We describe the design rules to ensure the conversion is correct, efficient and applicable to a large class of models. We show how the tool enables MDD of an implantable cardiac pacemaker. We demonstrate that UPP2SF preserves behaviors of the pacemaker model from UPPAAL to State flow. The resultant State flow chart is automatically converted into C and tested on a hardware platform for a set of requirements.