Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems

Authors:
Zhiwei Qin;Yi Wang;Duo Liu;Zili Shao
Affiliations:
-;-;-;-
Venue:
RTAS '12 Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium
Year:
2012

Citing 0
Cited 2

FTL2: a hybrid flash translation layer with logging for write reduction in flash memory

Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Reducing asynchrony in channel garbage-collection for improving internal parallelism of multichannel solid-state disks

ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers

Quantified Score

Hi-index	0.00

Visualization

Abstract

Due to the variable garbage collection latency, NAND flash memory storage systems may suffer long system response time, especially when the flash memory is close to be full. Most of existing flash translation layer (FTL) schemes focus on improving the average response time but ignore to provide a desirable worst case response time upper bound. This paper proposes a Real-time Flash Translation Layer (RFTL) scheme to hide the long garbage collection latency while satisfying a worst case response time upper bound that achieves an ideal case. We achieve this by using a distributed partial garbage collection policy that enables RFTL to reclaim the space and to serve the write requests simultaneously. A new block-level address mapping approach is designed to guarantee enough free space to serve the write request arriving at any time period. Experimental results show that our scheme improves both the worst case system response time and the average system response time compared with previous work.