FTL2: a hybrid flash translation layer with logging for write reduction in flash memory

  • Authors:

  • Tianzheng Wang;Duo Liu;Yi Wang;Zili Shao

  • Affiliations:

  • University of Toronto, Toronto, ON, Canada;Chongqing University, Chongqing, China;The Hong Kong Polytechnic University, Hong Kong, Hong Kong;The Hong Kong Polytechnic University, Hong Kong, Hong Kong

  • Venue:
  • Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
  • Year:
  • 2013

Quantified Score

Hi-index 0.00

Visualization

Abstract

NAND flash memory has been widely used to build embedded devices such as smartphones and solid state drives (SSD) because of its high performance, low power consumption, great shock resistance and small form factor. However, its lifetime and performance are greatly constrained by partial page updates, which will lead to early depletion of free pages and frequent garbage collections. On the one hand, partial page updates are prevalent as a large portion of I/O does not modify file contents drastically. On the other hand, general-purpose cache usually does not specifically consider and eliminate duplicated contents, despite its popularity. In this paper, we propose a hybrid approach called FTL2, which employs both logging and mapping techniques in flash translation layer (FTL), to tackle the endurance problem and performance degradation caused by partial page updates in flash memory. FTL2 logs the latest contents in a high-speed temporary storage, called Content Cache to handle partial page updates. Experimental results show that FTL2 can greatly reduce page writes and postpone garbage collections with a small overhead.