IBM Journal of Research and Development - Spintronics
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 45th annual Design Automation Conference
Phase-change random access memory: a scalable technology
IBM Journal of Research and Development
Spike-timing-dependent learning in memristive nanodevices
NANOARCH '08 Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures
A durable and energy efficient main memory using phase change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Scalable high performance main memory system using phase-change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Memory mapped ECC: low-cost error protection for last level caches
Proceedings of the 36th annual international symposium on Computer architecture
PDRAM: a hybrid PRAM and DRAM main memory system
Proceedings of the 46th Annual Design Automation Conference
Voltage-Driven Multilevel Programming in Phase Change Memories
MTDT '09 Proceedings of the 2009 IEEE International Workshop on Memory Technology, Design, and Testing
PACT '09 Proceedings of the 2009 18th International Conference on Parallel Architectures and Compilation Techniques
Characterizing and mitigating the impact of process variations on phase change based memory systems
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Use ECP, not ECC, for hard failures in resistive memories
Proceedings of the 37th annual international symposium on Computer architecture
Proceedings of the 37th annual international symposium on Computer architecture
Proceedings of the 47th Design Automation Conference
An overview of non-volatile memory technology and the implication for tools and architectures
Proceedings of the Conference on Design, Automation and Test in Europe
Enhancing phase change memory lifetime through fine-grained current regulation and voltage upscaling
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory
Proceedings of the 48th Design Automation Conference
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory
DSN '11 Proceedings of the 2011 IEEE/IFIP 41st International Conference on Dependable Systems&Networks
Hybrid nonvolatile disk cache for energy-efficient and high-performance systems
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
A lifetime aware buffer assignment method for streaming applications on DRAM/PRAM hybrid memory
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
BLog: block-level log-block management for NAND flash memorystorage systems
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
FTL2: a hybrid flash translation layer with logging for write reduction in flash memory
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Proceedings of the ACM International Conference on Computing Frontiers
DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems
Proceedings of the Conference on Design, Automation and Test in Europe
Software enabled wear-leveling for hybrid PCM main memory on embedded systems
Proceedings of the Conference on Design, Automation and Test in Europe
SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors
Proceedings of the Conference on Design, Automation and Test in Europe
The design of sustainable wireless sensor network node using solar energy and phase change memory
Proceedings of the Conference on Design, Automation and Test in Europe
Cache coherence enabled adaptive refresh for volatile STT-RAM
Proceedings of the Conference on Design, Automation and Test in Europe
Cooperating virtual memory and write buffer management for flash-based storage systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DHeating: dispersed heating repair for self-healing NAND flash memory
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
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In recent years, non-volatile memory (NVM) technologies have emerged as candidates for future universal memory. NVMs generally have advantages such as low leakage power, high density, and fast read spead. At the same time, NVMs also have disadvantages. For example, NVMs often have asymetric read and write speed and energy cost, which poses new challenges when applying NVMs. This paper contains a collection of four contributions, presenting basic introduction on three emerging NVM technologies, their unique characteristics, potential challenges, and new opportunities that they may bring forward in memory systems.