ACM Computing Surveys (CSUR)
An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Efficient management for large-scale flash-memory storage systems with resource conservation
ACM Transactions on Storage (TOS)
CFLRU: a replacement algorithm for flash memory
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
An adaptive two-level management for the flash translation layer in embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Valgrind: a framework for heavyweight dynamic binary instrumentation
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
A log buffer-based flash translation layer using fully-associative sector translation
ACM Transactions on Embedded Computing Systems (TECS)
BPLRU: a buffer management scheme for improving random writes in flash storage
FAST'08 Proceedings of the 6th USENIX Conference on File and Storage Technologies
Design tradeoffs for SSD performance
ATC'08 USENIX 2008 Annual Technical Conference on Annual Technical Conference
Application specific non-volatile primary memory for embedded systems
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Energy-aware flash memory management in virtual memory system
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Write amplification analysis in flash-based solid state drives
SYSTOR '09 Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference
Performance Trade-Offs in Using NVRAM Write Buffer for Flash Memory-Based Storage Devices
IEEE Transactions on Computers
CFDC: a flash-aware replacement policy for database buffer management
Proceedings of the Fifth International Workshop on Data Management on New Hardware
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
RNFTL: a reuse-aware NAND flash translation layer for flash memory
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Write activity reduction on flash main memory via smart victim cache
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Register allocation for write activity minimization on non-volatile main memory
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Operation-aware buffer management in flash-based systems
Proceedings of the 2011 ACM SIGMOD International Conference on Management of data
Cooperating Write Buffer Cache and Virtual Memory Management for Flash Memory Based Systems
RTAS '11 Proceedings of the 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium
MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems
Proceedings of the 48th Design Automation Conference
ExLRU: a unified write buffer cache management for flash memory
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
Emerging non-volatile memories: opportunities and challenges
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Register allocation for write activity minimization on non-volatile main memory for embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
FAB: flash-aware buffer management policy for portable media players
IEEE Transactions on Consumer Electronics
LRU-WSR: integration of LRU and writes sequence reordering for flash memory
IEEE Transactions on Consumer Electronics
Recently-evicted-first buffer replacement policy for flash storage devices
IEEE Transactions on Consumer Electronics
CCF-LRU: a new buffer replacement algorithm for flash memory
IEEE Transactions on Consumer Electronics
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Flash memory is becoming the preferred choice of secondary storage in mobile devices and embedded systems. The performance of Flash memory is dictated by asymmetric speeds of read and write, limited number of erase times, and the absence of in-place updates. To improve the performance of Flash-based storage systems, the write buffer has been provided in Flash memories recently. At the same time, new virtual memory management strategies have been proposed in recent studies that consider the characteristics of Flash memory. Currently, approaches on these two memory layers are considered separately, which fail to explore the full potential of these two layers. In this paper, we propose cooperative management schemes for virtual memory and write buffer to maximize the performance of Flash-memory-based systems. Management on virtual memory is designed to exploit write buffer status via reordering of the write sequences. The proposed write buffer management scheme works seamlessly with the proposed virtual memory management scheme. Experimental results show that significant improvement in I/O performance and reduction of the number of erase and write operations can be achieved compared to the state-of-art approaches.