Simple register spilling in a retargetable compiler
Software—Practice & Experience
Register allocation via graph coloring
Register allocation via graph coloring
Static branch frequency and program profile analysis
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
Compiler-assisted demand paging for embedded systems with flash memory
Proceedings of the 4th ACM international conference on Embedded software
A fast, memory-efficient register allocation framework for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
A durable and energy efficient main memory using phase change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Write activity reduction on flash main memory via smart victim cache
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Proceedings of the 47th Design Automation Conference
A set-based mapping strategy for flash-memory reliability enhancement
Proceedings of the Conference on Design, Automation and Test in Europe
Minimizing write activities to non-volatile memory via scheduling and recomputation
SASP '10 Proceedings of the 2010 IEEE 8th Symposium on Application Specific Processors (SASP)
Optimal task allocation on non-volatile memory based hybrid main memory
Proceedings of the 2011 ACM Symposium on Research in Applied Computation
Write activity reduction on non-volatile main memories for embedded chip multiprocessors
ACM Transactions on Embedded Computing Systems (TECS)
Cooperating virtual memory and write buffer management for flash-based storage systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Non-volatile memories are good candidates for DRAM replacement as main memory in embedded systems and they have many desirable characteristics. Nevertheless, the disadvantages of non-volatile memory co-exist with its advantages. First, the lifetime of some of the non-volatile memories is limited by the number of erase operations. Second, read and write operations have asymmetric speed or power consumption in nonvolatile memory. This paper focuses on the embedded systems using non-volatile memory as main memory. We propose register allocation technique with re-computation to reduce the number of store instructions. When non-volatile memory is applied as the main memory, reducing store instructions will reduce write activities on non-volatile memory. With the proposed approach, the lifetime of non-volatile memory is extended accordingly. The experimental results demonstrate that the proposed technique can efficiently reduce the number of store instructions on systems with non-volatile memory by 25% on average.