An adaptive two-level management for the flash translation layer in embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
A durable and energy efficient main memory using phase change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
RNFTL: a reuse-aware NAND flash translation layer for flash memory
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Proceedings of the 47th Design Automation Conference
Increasing PCM main memory lifetime
Proceedings of the Conference on Design, Automation and Test in Europe
A frequent-value based PRAM memory architecture
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Modeling, Architecture, and Applications for Emerging Memory Technologies
IEEE Design & Test
PCM-FTL: A Write-Activity-Aware NAND Flash Memory Management Scheme for PCM-Based Embedded Systems
RTSS '11 Proceedings of the 2011 IEEE 32nd Real-Time Systems Symposium
FTL2: a hybrid flash translation layer with logging for write reduction in flash memory
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
TreeFTL: efficient RAM management for high performance of NAND flash-based storage systems
Proceedings of the Conference on Design, Automation and Test in Europe
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This paper targets at an embedded system with phase change memory (PCM) and NAND flash memory. Although PCM is a promising main memory alternative and is recently introduced to embedded system designs, its endurance keeps drifting down and greatly limits the lifetime of the whole system. Therefore, this paper presents a block-level flash memory management scheme, WAB-FTL, to effectively manage NAND flash memory while reducing write activities of the PCM-based embedded systems. The basic idea is to preserve each bit in flash mapping table hosted by PCM from being inverted frequently during the process of mapping table update. To achieve this, a new merge strategy is adopted in WAB-FTL to delay the mapping table update, and a tiny mapping buffer is used for caching frequently updated mapping records. Experimental results based on Android traces show that WAB-FTL can effectively reduce write activities when compared with the baseline scheme.