A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems

  • Authors:
  • Jin Kyu Kim;Hyung Gyu Lee;Shinho Choi;Kyoung Il Bahng

  • Affiliations:
  • Samsung Advanced Institute of Technology, Yongin, South Korea;Samsung Advanced Institute of Technology, Yongin, South Korea;Samsung Electronics Co. LTD, Hwaseong, South Korea;Samsung Electronics Co. LTD, Hwaseong, South Korea

  • Venue:
  • EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
  • Year:
  • 2008

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Abstract

NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is still suffering from serious performance degradation for random or small size write access. This degradation mainly comes from the physical constraints of NAND flash: erase-before-program and different unit size of erase and program operations. To overcome these constraints, we propose to use PRAM (Phase-change RAM) which supports advanced features: fast byte access capability and no requirement for erase-before-program. In this paper, we focus on developing a high-performance NAND flash-based storage system by maximally exploiting the advanced feature of PRAM, in terms of performance and wearing out. To do this, we first propose a new hybrid storage architecture which consists of PRAM and NAND flash. Second, we devise two novel software schemes for the proposed hybrid storage architecture; FSMS (File System Metadata Separation) and hFTL (hybrid Flash Translation Layer). Finally, we demonstrate that our hybrid architecture increases the performance up to 290% and doubles the lifespan compared to the existing NAND flash only storage systems.