A superblock-based flash translation layer for NAND flash memory

  • Authors:

  • Jeong-Uk Kang;Heeseung Jo;Jin-Soo Kim;Joonwon Lee

  • Affiliations:

  • Korea Advanced Institute of Science and Technology (KAIST) Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST) Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST) Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST) Daejeon, Korea

  • Venue:
  • EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
  • Year:
  • 2006

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Abstract

In NAND flash-based storage systems, an intermediate software layer called a flash translation layer (FTL)is usually employed to hide the erase-before-write characteristics of NAND flash memory. This paper proposes a novel superblockbased FTL scheme, which combines a set of adjacent logical blocks into a superblock. In the proposed FTL scheme, superblocks are mapped at coarse granularity,while pages inside the superblock are mapped freely at fine granularity to any location in several physical blocks. To reduce extra storage and flash memory operations, the fine-grain mapping information is stored in the spare area of NAND flash memory. This hybrid mapping technique has the flexibility provided by fine-grain address translation, while reducing the memory overhead to the level of coarse-grain address translation. Our experimental results show that the proposed FTL scheme decreases the garbage collection overhead up to 40% compared to previous FTL schemes.