Mapping granularity and performance tradeoffs for solid state drive

  • Authors:

  • Yangsun Lee;Leonard Barolli;Seung-Ho Lim

  • Affiliations:

  • Division of Computer Engineering, Mokwon University, Daejeon, Korea;Department of Information and Communication Engineering, Fukuoka Institute of Technology, Fukuoka, Japan;Department of Digital Information Engineering, Hankuk University of Foreign Studies, Yongin, Korea

  • Venue:
  • The Journal of Supercomputing
  • Year:
  • 2013

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Abstract

Evolving NAND flash-based Solid State Drives (SSDs) tend to get denser and faster, and these are quickly becoming popular in a wide variety of applications. Flash-based SSDs are composed of dozens of non-volatile flash memories with multi-channel and multi-way architecture. Due to the physical limits, Flash Translation Layer (FTL) is employed for the management between host requests and flash requests operations. Among many roles of FTL, mapping management is main key of SSD performance. This paper presents tradeoffs of page-level FTL mapping granularity for appropriate target performance of SSDs. The mapping management is designed with regard to the SSD architecture such as multi-channel and multi-way. Three mapping tradeoff issues are addressed: static and dynamic mapping, mapping unit size, and caching issue. The simulation results shows that various page-level FTL mapping granularities have a decisive effect on SSD design; not only the performance issue, but also resource management.