The design and implementation of a log-structured file system
ACM Transactions on Computer Systems (TOCS)
A fast start-up technique for flash memory based computing systems
Proceedings of the 2005 ACM symposium on Applied computing
Efficient management for large-scale flash-memory storage systems with resource conservation
ACM Transactions on Storage (TOS)
A superblock-based flash translation layer for NAND flash memory
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
ACM Transactions on Storage (TOS)
A log buffer-based flash translation layer using fully-associative sector translation
ACM Transactions on Embedded Computing Systems (TECS)
A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
ACM Transactions on Embedded Computing Systems (TECS)
LTFTL: lightweight time-shift flash translation layer for flash memory based embedded storage
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
A self-adjusting flash translation layer for resource-limited embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
An adaptive flash translation layer for high-performance storage systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
BLAS: Block-level adaptive striping for solid-state drives
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Recently, the capacity of flash-memory storage systems has grown rapidly, and flash-memory technology has advanced along with the wave of consumer electronics and embedded systems. In order to properly manage product cost and initialization performance, vendors face serious challenges in system design and analysis. Thus, the timing analysis of system initialization and crash recovery for a segment-based flash translation layer has become an important research topic. This article focuses on system initialization, crash recovery, and timing analysis. The timing analysis of system initialization involves the relationship between the size of the main memory and the system initialization time. The timing analysis of crash recovery explains the worst case recovery time. The experiments in this study show that the timing analysis of system initialization and crash recovery can be applied to the segment-based flash translation layer.