eNVy: a non-volatile, main memory storage system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A New Flash Memory Management for Flash Storage System
COMPSAC '99 23rd International Computer Software and Applications Conference
Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Efficient management for large-scale flash-memory storage systems with resource conservation
ACM Transactions on Storage (TOS)
An adaptive two-level management for the flash translation layer in embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A flash-memory based file system
TCON'95 Proceedings of the USENIX 1995 Technical Conference Proceedings
μ-tree: an ordered index structure for NAND flash memory
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
ACM Transactions on Embedded Computing Systems (TECS)
μ-FTL:: a memory-efficient flash translation layer supporting multiple mapping granularities
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
A time-predictable system initialization design for huge-capacity flash-memory storage systems
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
FAST: an efficient flash translation layer for flash memory
EUC'06 Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A survey of address translation technologies for flash memories
ACM Computing Surveys (CSUR)
BLAS: Block-level adaptive striping for solid-state drives
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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The capacity of flash memory storage systems has been growing at a speed similar to many other storage systems. In order to properly manage the product cost, vendors face serious challenges in resource-limited embedded systems. In this article, a self-adjusting flash translation layer is proposed with low memory requirements. The objective of the design is to provide efficient address mapping and low garbage collection overhead, while controlling main memory usage of the flash translation layer. The capability of the design is evaluated over realistic workloads and benchmarks. System performance is also guaranteed under low memory requirements.