IEEE Transactions on Computers
Algorithms and data structures for flash memories
ACM Computing Surveys (CSUR)
A superblock-based flash translation layer for NAND flash memory
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
An adaptive two-level management for the flash translation layer in embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
BPLRU: a buffer management scheme for improving random writes in flash storage
FAST'08 Proceedings of the 6th USENIX Conference on File and Storage Technologies
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
CFTL: a convertible flash translation layer adaptive to data access patterns
Proceedings of the ACM SIGMETRICS international conference on Measurement and modeling of computer systems
KAST: K-Associative Sector Translation for NAND flash memory in real-time systems
Proceedings of the Conference on Design, Automation and Test in Europe
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
CCF-LRU: a new buffer replacement algorithm for flash memory
IEEE Transactions on Consumer Electronics
TreeFTL: efficient RAM management for high performance of NAND flash-based storage systems
Proceedings of the Conference on Design, Automation and Test in Europe
SAW: system-assisted wear leveling on the write endurance of NAND flash devices
Proceedings of the 50th Annual Design Automation Conference
A disturb-alleviation scheme for 3D flash memory
Proceedings of the International Conference on Computer-Aided Design
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The popularity of flash memory has triggered the emerging of various products with flash memory as storage medium. More advanced architectures with better hardware resources are now explored by vendors to fit different market needs. Different from the past work, this paper proposes to consider RAM as a storage medium together with flash memory to take advantage of the characteristics of both RAM and flash memory. In particular, an adaptive management strategy is proposed with the considerations of access patterns to improve both the system performance and the system endurance. The capability of the proposed approach is evaluated by a series of experiments, for which we have very encouraging results.