Formal Representation and Analysis of Batch Stock Trading Systems by Logical Petri Net Workflows
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
ICDCS '03 Proceedings of the 23rd International Conference on Distributed Computing Systems
Verifying functions in online stock trading systems
Journal of Computer Science and Technology
A distributed approach for fault detection and diagnosis based on time Petri nets
Mathematics and Computers in Simulation - Special issue: Computational engineering in systems applications (CESA 2003)
A distributed approach for fault detection and diagnosis based on Time Petri Nets
Mathematics and Computers in Simulation
IEEE Transactions on Systems, Man, and Cybernetics, Part A: Systems and Humans
Petri net-based context modeling for context-aware systems
Artificial Intelligence Review
Design, Analysis and Verification of Real-Time Systems Based on Time Petri Net Refinement
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Modeling and Verification of Discrete Event Systems
HiLeS-T: an ADL for early requirement verification of embedded systems
Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems
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Time Petri nets (TPNs) are a popular Petri net model for specification and verification of real-time systems. A fundamental and most widely applied method for analyzing Petri nets is reachability analysis. The existing technique for reachability analysis of TPNs, however, is not suitable for timing property verification because one cannot derive end-to-end delay in task execution, an important issue for time-critical systems, from the reachability tree constructed using the technique. In this paper, we present a new reachability based analysis technique for TPNs for timing property analysis and verification that effectively addresses the problem. Our technique is based on a concept called clock-stamped state class (CS-class). With the reachability tree generated based on CS-classes, we can directly compute the end-to-end time delay in task execution. Moreover, a CS-class can be uniquely mapped to a traditional state class based on which the conventional reachability tree is constructed. Therefore, our CS-class-based analysis technique is more general than the existing technique. We show how to apply this technique to timing property verification of the TPN model of a command and control (C2) system