Hume: a domain-specific language for real-time embedded systems
Proceedings of the 2nd international conference on Generative programming and component engineering
A model-driven design environment for embedded systems
Proceedings of the 43rd annual Design Automation Conference
A Practical Guide to SysML: Systems Modeling Language
A Practical Guide to SysML: Systems Modeling Language
DERAF: a high-level aspects framework for distributed embedded real-time systems design
Proceedings of the 10th international conference on Early aspects: current challenges and future directions
Embedded System Design: Modeling, Synthesis and Verification
Embedded System Design: Modeling, Synthesis and Verification
HiLeS2: model driven embedded system virtual prototype generation
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
Timed petri nets and timed automata: on the discriminating power of zeno sequences
ICALP'06 Proceedings of the 33rd international conference on Automata, Languages and Programming - Volume Part II
Reachability analysis of real-time systems using time Petri nets
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
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Verification of functional and non-functional requirements throughout the design process is a cost-effective solution when compared to a build-test validation process. By using a model based design process and by describing system behavior with a formal model, model checking becomes a viable solution to perform requirement verification at early stages of the design process. This paper presents how the HiLeS ADL can be used to express the behavior of the system with a Petri Net and how to use that representation to perform system verification. HiLeS is used as a intermediate stage of a model driven automated virtual prototype design framework, in which SysML is used for capturing requirements and system modeling.