Theoretical and practical limits of dynamic voltage scaling
Proceedings of the 41st annual Design Automation Conference
Optimal technology selection for minimizing energy and variability in low voltage applications
Proceedings of the 13th international symposium on Low power electronics and design
| Hi-index | 0.00 |
Designing an ultra-low power sensor node requires careful consideration of the system-level energy budget. Depending on applications, various components can dominate total energy. In this paper, we review three different system energy budget scenarios where any of the microprocessor, memory, and timer of a sensor node can dominate the energy budget. The design space and corresponding trade-offs for these three components are explored to suggest guidelines for the design of ultra-low power sensor nodes.