Proceedings of the 2008 ACM symposium on Applied computing
A durable and energy efficient main memory using phase change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Scalable high performance main memory system using phase-change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Adaptive page grouping for energy efficiency in hybrid PRAM-DRAM main memory
Proceedings of the 2012 ACM Research in Applied Computation Symposium
Adaptive wear-leveling algorithm for PRAM main memory with a DRAM buffer
ACM Transactions on Embedded Computing Systems (TECS)
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We propose a novel wear-leveling algorithm for the hybrid main memory architecture which exploits both fast read and write speed of DRAM and low power consumption and high density of PRAM. The wear-leveling algorithm consists of three techniques: DRAM buffering for reducing the write count, multiple data swapping for evening out the write count among all pages, and data shifting evening out the write count among all pages and lines. In order to evaluate performance, we implement a PIN-based wear-leveling simulator. In SPEC CPU2006, our proposed schemes can reduce the write count and maintain the write count equally among all pages and lines with little additional overhead.