Adaptive page grouping for energy efficiency in hybrid PRAM-DRAM main memory

  • Authors:
  • Dong-Jae Shin;Sung Kyu Park;Seong Min Kim;Kyu Ho Park

  • Affiliations:
  • Korea Advanced Institute of Science and Technology (KAIST), Guseong-dong, Yuseong-gu, Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST), Guseong-dong, Yuseong-gu, Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST), Guseong-dong, Yuseong-gu, Daejeon, Korea;Korea Advanced Institute of Science and Technology (KAIST), Guseong-dong, Yuseong-gu, Daejeon, Korea

  • Venue:
  • Proceedings of the 2012 ACM Research in Applied Computation Symposium
  • Year:
  • 2012

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Abstract

The recent technology faces the challenges to reduce energy consumption of DRAM, which consumes about 30% of total energy in data centers. Phase change RAM (PRAM), not requiring the charge current because of its non-volatility, has appeared for replacing DRAM. However, it has some disadvantages which are its low performance, high write power, and write endurance limitation compared to DRAM. To overcome these weak points of PRAM, the research related to the hybrid model combining PRAM with DRAM has been progressed. Unfortunately, previous works on hybrid memory is hard to be applied to the market because established hardware needs to be changed. In this paper, we propose an Adaptive Page Grouping (APG) algorithm, which manages the hybrid PRAM-DRAM main memory for reducing energy consumption. We suggest the method to store the access information of pages without using additional space and make operating system (OS) can access it. We allocate pages effectively and reduce the migration among them through the grouping of pages which has similar access properties. We can apply our system immediately as a software patch when PRAM is released, because all these schemes are implemented in Linux OS without additional hardware. Thus, we have decreased average energy consumption by 36%, with maximum up to 42%, compared to a DRAM system while access time increases less than 8% including high latency of PRAM.