Interfacing reversible pass-transistor CMOS chips with conventional restoring CMOS circuits

  • Authors:

  • Stéphane Burignat;Michael Kirkedal Thomsen;Michał Klimczak;Mariusz Olczak;Alexis De Vos

  • Affiliations:

  • Vakgroep Elektronica en Informatiesystemen, Universiteit Gent, Gent, Belgium;Department of Computer Science, DIKU, University of Copenhagen, Copenhagen, Denmark;Vakgroep Elektronica en Informatiesystemen, Universiteit Gent, Gent, Belgium;Vakgroep Elektronica en Informatiesystemen, Universiteit Gent, Gent, Belgium;Vakgroep Elektronica en Informatiesystemen, Universiteit Gent, Gent, Belgium and Imec v.z.w., Leuven, Belgium

  • Venue:
  • RC'11 Proceedings of the Third international conference on Reversible Computation
  • Year:
  • 2011

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Abstract

Recent progress on the prototyping of reversible digital circuits, have shown that adiabatic reversible dual-line pass-transistor logic can be used for special purpose applications in reversible computation. This, however, raises new issues regarding the compatibility between this adiabatic logic implementation and conventional CMOS logic. The greatest difficulty is brought by the difference in signal shape used by these two logic families. Whereas standard switching CMOS circuits are operated by rectangular pulses, dual-line pass-transistor reversible circuits are controlled by triangular or trapezoidal signals to ensure adiabatic switching of the transistors. This work proposes a simple technical solution that allows interfacing reversible pass-transistor logic with conventional CMOS logic, represented here by an FPGA embedded in a commercial Xilinx Spartan-3E board. All proposed solutions have successfully been tested, which enables the FPGA to perform calculations directly on a reversible chip.