A Methodology for Handling Complex Functional Constraints for Large Industrial Designs
Journal of Electronic Testing: Theory and Applications
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It's surprising to realize that buyers of intellectual property (IP) blocks used in system-on-chip (SOC) designs may not be entirely aware of what they're getting and how it works. But that's one reason why software for IC design verification is gaining attention: to ensure that those blocks will work as intended, both internally and with other components. Another reason is time to market. SOC providers could shorten their time to market considerably if they didn't have to spend up to 70 percent of it verifying that their designs will plug and play. SOCs are complex designs that fit most or all of the circuitry required for a cellphone, for instance, or a Bluetooth radio on a single IC. As their numbers and complexity increase, the design verification gap is widening. But help is at hand in a new type of design verification called assertions-based verification, although a looming standards battle threatens to slow its widespread adoption.