Latency-and hazard-free volume memory architecture for direct volume rendering
EGGH'96 Proceedings of the Eleventh Eurographics conference on Graphics Hardware
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Innovative circuit designs intended to bring inexpensive dynamic memories up to speed are discussed. The features of video DRAMs, the high-data-rate application that spurred the development of application-specific DRAMs that utilize wide on-chip buses, are described. Several new chips use the wide data buses within DRAMs to advantage; on most of them 1024 to 4096 memory locations may be accessed in parallel. Examples are cache DRAMs, enhanced DRAMs, synchronous DRAMs, and Rambus DRAMs, all described in this report