Design and analysis of a FIFO linked loosely coupled dual processor system
Journal of Microcomputer Applications
Comparative Performance Analysis of Single Bus Multiprocessor Architectures
IEEE Transactions on Computers
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A minimum size bus for interconnecting different modules of an ISDN PBX is presented in this paper. The distributed system used has many peripheral modules running the link layer protocols and four central modules dealing with B-channel switching, signalling messages and D-channel packet data transfer. The proposed architecture takes advantage of asymmetries in module communication and permits fair access and good performance in using the single bus.