Cost effective implementation of flux limiter functions using partial reconfiguration

Authors:
Mohamad Sofian Abu Talip;Takayuki Akamine;Yasunori Osana;Naoyuki Fujita;Hideharu Amano
Affiliations:
Graduate School of Science and Technology, Keio University, Yokohama, Japan;Graduate School of Science and Technology, Keio University, Yokohama, Japan;Department of Electrical and Electronics Engineering, University of the Ryukyus, Okinawa, Japan;Aerospace Research and Development Directorate, Japan Aerospace Exploration Agency, Tokyo, Japan;Graduate School of Science and Technology, Keio University, Yokohama, Japan
Venue:
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Year:
2012

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Abstract

Computational Fluid Dynamics (CFD) is used as a common design tool in aerospace industry. UPACS, a package for CFD is convenient for users, since a customized simulator can be built just by selecting required functions. The problem is its computation speed which is hard to be enhanced by using clusters due to its complex memory access patterns. As an economical solution, accelerators using FPGAs are hopeful candidates. However, the total scale of UPACS is too large to be implemented on small numbers of FPGAs. For cost efficient implementation, partial reconfiguration which can dynamically reconfigure only required functions is proposed in this paper. Here, MUSCL algorithm used frequently in UPACS is selected as a target. Partial reconfiguration is applied to the flux limiter functions (FLF) in MUSCL. Four FLFs are implemented for Turbulence MUSCL (TMUSCL) and eight FLFs are for Convection MUSCL (CMUSCL). All FLFs are developed independently and separated from the top MUSCL module. At start-up, only required FLFs are selected and deployed to the system without interfering the other modules. This implementation has successfully reduced the resource utilization by 44% to 63%. Total power consumption also reduced by 33%. Configuration speed is improved by 34-times faster as compared to fully reconfiguration method. All implemented functions achieved at least 17 times speed-up compared with the software implementation.