Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automated Protocol Validation in Argos: Assertion Proving and Scatter Searching
IEEE Transactions on Software Engineering
An improved protocol reachability analysis technique
Software—Practice & Experience
Design and validation of computer protocols
Design and validation of computer protocols
Memory-efficient algorithms for the verification of temporal properties
Formal Methods in System Design - Special issue on computer-aided verification: general methods
Output Guards and Nondeterminism in “Communicating Sequential Processes”
ACM Transactions on Programming Languages and Systems (TOPLAS)
Communicating sequential processes
Communications of the ACM
Guarded commands, nondeterminacy and formal derivation of programs
Communications of the ACM
Symbolic Model Checking
On the Verification of Temporal Properties
Proceedings of the IFIP TC6/WG6.1 Thirteenth International Symposium on Protocol Specification, Testing and Verification XIII
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
An analysis of bistate hashing
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
Modelization and verification of a multiprocessor realtime OS kernel
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Formal Methods at AT&T - An Industrial Usage Report
FORTE '91 Proceedings of the IFIP TC6/WG6.1 Fourth International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols: Formal Description Techniques, IV
On the Complexity of Branching Modular Model Checking (Extended Abstract)
CONCUR '95 Proceedings of the 6th International Conference on Concurrency Theory
Combining Partial Order Reductions with On-the-fly Model-Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
General technique for communications protocol validation
IBM Journal of Research and Development
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
A Framework for Automatic Construction of Abstract Promela Models
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
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SPIN is an efficient, automated verification tool that can be used to design robust software for distributed systems in general, and bug-free communications protocols in particular. This paper outlines the use of the tool to address protocol design problems. As an example we consider the verification of a published protocol for implementing synchronous rendezvous operations in a distributed system. We also briefly review some of the techniques that SPIN employs to address the computational complexity of larger verification problems.