An improved protocol reachability analysis technique
Software—Practice & Experience
SIGCOMM '87 Proceedings of the ACM workshop on Frontiers in computer communications technology
Synthesis of Communication Protocols: Survey and Assessment
IEEE Transactions on Computers - Special issue on protocol engineering
Generalized fair reachability analysis for cyclic protocols: part 1
PSTV '94 Proceedings of the fourteenth of a series of annual meetings on Protocol specification, testing and verification XIV
On Communicating Finite-State Machines
Journal of the ACM (JACM)
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IEEE Transactions on Software Engineering
Proceedings of the IFIP WG6.1 Second International Workshop on Protocol Specification, Testing and Verification
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Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
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Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
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SIGCOMM '83 Proceedings of the eighth symposium on Data communications
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IBM Journal of Research and Development
ICSM '01 Proceedings of the IEEE International Conference on Software Maintenance (ICSM'01)
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Distributed and Parallel Databases
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FMICS'07 Proceedings of the 12th international conference on Formal methods for industrial critical systems
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Computer Communications
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Computer Communications
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Software Testing, Verification & Reliability
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Simultaneous reachability analysis is a relief strategy for validating protocols specified as a collection of n (n = 2) processes communicating over error-free simplex channels. This analysis is based on the execution of sets of simultaneously executable transitions at every simultaneously reachable global state of a given protocol. It is proven that simultaneous reachability analysis identifies every deadlock, every nonexecutable transition, every missing receiving transition causing an unspecified reception and every channel at which a buffer overflow occurs. An empirical study is carried out to demonstrate the efficiency of simultaneous reachability analysis in terms of time and memory requirements. In this study, 300 protocols, constructed by an automatic protocol synthesizer, are used and results are evaluated with respect to the characteristics of these protocols. The results of applying the proposed strategy on two real protocols are given.