Mechanical verification and automatic implementation of communication protocols
IEEE Transactions on Software Engineering
On Communicating Finite-State Machines
Journal of the ACM (JACM)
Proceedings of the IFIP WG6.1 Second International Workshop on Protocol Specification, Testing and Verification
Synthesis of Communication Protocols: Survey and Assessment
IEEE Transactions on Computers - Special issue on protocol engineering
A User Friendly Software Environment for Protocol Synthesis
IEEE Transactions on Computers - Special issue on protocol engineering
Synthesis of communications protocols: an annotated bibliography
ACM SIGCOMM Computer Communication Review
A novel technique for synthesizing distributed and concurrent protocol specifications
SEPADS'08 Proceedings of the 7th WSEAS International Conference on Software Engineering, Parallel and Distributed Systems
Research: Protocol validation by simultaneous reachability analysis
Computer Communications
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An interactive synthesis algorithm, to construct two communicating finite-state machines (protocols), is presented. The machines exchange messages over two unidirectional FIFO (first-in first-out) channels when the function of the protocol has been given. The synthesis algorithm first constructs the global state transitiion graph (GSTG) of a protoco to be synthesized and then produces the protocol. It is based on a set of production rules and a set of deadlock avoidance rules, which guarantee that complete reception and deadlock freeness capabilities are provided in the interacting process. This synthesis algorithm prevents a designer from creating unspecified reception and nonexecutable transition, avoids the occurrence of deadlocks, and monitors for the presence of buffer overflow.