Improved bit-flipping decoding of low-density parity-check codes

Authors:
N. Miladinovic;M. P.C. Fossorier
Affiliations:
Dept. of Electr. Eng., Univ. of Hawaii, Honolulu, HI, USA;-
Venue:
IEEE Transactions on Information Theory
Year:
2005

Citing 0
Cited 5

Error rate estimation of low-density parity-check codes on binary symmetric channels using cycle enumeration

IEEE Transactions on Communications
A differential binary message-passing LDPC decoder

IEEE Transactions on Communications
Adaptive threshold technique for bit-flipping decoding of low-density parity-check codes

IEEE Communications Letters
On fuzzy syndrome hashing with LDPC coding

Proceedings of the 4th International Symposium on Applied Sciences in Biomedical and Communication Technologies
An area efficient LDPC decoder using a reduced complexity min-sum algorithm

Integration, the VLSI Journal

Quantified Score

Hi-index	754.84

Visualization

Abstract

In this correspondence, a new method for improving hard-decision bit-flipping decoding of low-density parity-check (LDPC) codes is presented. Bits with a number of unsatisfied check sums larger than a predetermined threshold are flipped with a probability p ≤ 1 which is independent of the code considered. The probability p is incremented during decoding according to some rule. With a proper choice of the initial p, the proposed improved bit-flipping (BF) algorithm achieves gain not only in performance, but also in average decoding time for signal-to-noise ratio (SNR) values of interest with respect to p = 1.