An Area-Effective Cell-Based Channel Decoder LSI For a Digital Satellite TV Broadcasting
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
New Syndrome Check Error Estimation and Its Concatenated Coding
Wireless Personal Communications: An International Journal
Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications
Journal of Signal Processing Systems
New Cost-Effective Simplified Euclid's Algorithm for Reed-Solomon Decoders
Journal of Signal Processing Systems
Hi-index | 0.43 |
The Reed Solomon code (RS code) has been widely employed in digital audio/video equipment owing to its excellent capability for correcting burst errors and relatively easy implementation. The authors propose an architecture for an error correction circuit suitable for high-rate data decoding of the Reed-Solomon code. The circuit has encoder and decoder functions by 2 symbol random error correction as well as 4 symbol erasure correction. 23 Mbyte/s rate of data decoding is sufficient for compressed video signals of high-definition as well as those of standard-definition TVs