The Princeton Engine: a real-time video system simulator

  • Authors:
  • D. Chin;J. Passe;F. S. Bernard;H. Taylor;S. P. Knight

  • Affiliations:
  • David Sarnoff Res. Center, Princeton, NJ;-;-;-;-

  • Venue:
  • IEEE Transactions on Consumer Electronics
  • Year:
  • 1988

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Abstract

The authors describe the Princeton Engine, a 29.3-GIPS image processing system capable of simulating video rate signals, including NTSC and HDTV video, in real time. It consists of a massively parallel arrangement of up to 2048 processing elements, each containing a 16-bit arithmetic unit, a multiplier, a 64-word triple-port register stack (one write, two read), and 16000 words of local processor memory. In addition, an interprocessor communication bus (IPC) permits exchanges of data between neighboring processors during one instruction cycle. The authors present a novel method of parallel programming for digital signal processing applications and provide several examples