A Hardware/Software Co-Design of MP3 Audio Decoder
Journal of VLSI Signal Processing Systems
A Configurable Common Filterbank Processor for Multi-Standard Audio Decoder
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A novel MPEG audio degrouping algorithm and its architecture design
EURASIP Journal on Audio, Speech, and Music Processing
A VLSI architecture and the FPGA prototype for MPEG-2 audio/video decoding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We present a digital audio-specific DSP core designed for a dual decoder for MPEG/audio layer-3 (MP3) and MPEG-2 advanced audio coding (AAC). The processing core is a 20-bit fixed-point programmable DSP having an architecture suitable for audio signal processing. It supports special instructions such as UNPACK and Huffman as well as general arithmetic and logical instructions including pipelined-MAC. All instructions are completed within a single cycle. The DSP core is realized in a 0.35 μm 3.3 V CMOS technology and operates at 40 MHz. The implemented DSP core with a dedicated hardware accelerator can decode MP3 using only 13.33 MIPS and AAC using only 16.9 MIPS with high efficiency.