An improved scaled DCT architecture

  • Authors:
  • Zhigang Wu;Jin Sha;Zhongfeng Wang;Li Li;Minglun Gao

  • Affiliations:
  • Dept. of Phys., Nanjing Univ., Nanjing, China;-;-;-;-

  • Venue:
  • IEEE Transactions on Consumer Electronics
  • Year:
  • 2009

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Abstract

This paper presents an efficient architecture for computing the eight-point 1D scaled DCT (discrete cosine transform) with a new algorithm based on a selected Loeffler DCT scheme whose multiplications are placed in the last stage. The proposed DCT architecture does not require any scaling compensation in the computation. Furthermore, a multiplication approximation method is developed, which is more efficient than traditional CORDIC (coordinate rotation digital computer)-based algorithms. Compared to the latest work (Sun et al., 2007), the proposed approach can save 14% addition operations for the same precision requirement and the path delay can be significantly reduced as well.