LazyFTL: a page-level flash translation layer optimized for NAND flash memory
Proceedings of the 2011 ACM SIGMOD International Conference on Management of data
Hybrid hash index for NAND flash memory-based storage systems
Proceedings of the 6th International Conference on Ubiquitous Information Management and Communication
Analytic modeling of SSD write performance
Proceedings of the 5th Annual International Systems and Storage Conference
A survey of address translation technologies for flash memories
ACM Computing Surveys (CSUR)
Analytic Models of SSD Write Performance
ACM Transactions on Storage (TOS)
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For the last years, a number of flash translation layers (FTL) have been proposed for hiding erase-before-write architecture of NAND flash memory. However, although many conventional FTLs efficiently provide the logical to physical address remapping algorithms, they could not escape from the performance degradation when handling the hot data which tends to generate so many overwrites on the same logical address. In this paper, we propose a novel FTL algorithm called Hybrid Flash Translation Layer (HFTL) that adaptively exploits the sector mapping and log block based mapping schemes. To do so, HFTL first separates the hot data from the cold data by using the hot data identifier. And then it dynamically manages the former by using the sector mapping scheme showing an optimal performance for intensive overwrites at the same location, and the latter by using the log block based mapping scheme. By using this adaptive hybrid method, HFTL is always guaranteed to yield good performance for the pattern with the hot data as well as the pattern without it. Through a series of experiments, we show that HFTL yields better performance than conventional FTLs.