International Journal of Circuit Theory and Applications
| Hi-index | 0.43 |
A switched-capacitor (SC) implementation for a semisystolic realization of a 2D recursive filter structure is presented. The structure is capable of operating at video rates and is amenable to VLSI fabrication, due to the application of systolic array architecture and SC circuit techniques. The folded-cascode CMOS operational amplifier (op-amp) topology is adopted because it yields high performance in high-speed SC circuits. Utilization of this type of op-amp makes it possible to minimize the settling time response that governs the upper limit of throughput rate