The augmented data vortex switch fabric: An all-optical packet switched interconnection network with enhanced fault tolerance

  • Authors:
  • Neha Sharma;D. Chadha;Vinod Chandra

  • Affiliations:
  • Department of Electrical Engineering, Indian Institute of Technology, Delhi, New Delhi-110016, India;Department of Electrical Engineering, Indian Institute of Technology, Delhi, New Delhi-110016, India;Department of Electrical Engineering, Indian Institute of Technology, Delhi, New Delhi-110016, India

  • Venue:
  • Optical Switching and Networking
  • Year:
  • 2007

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Abstract

Optical Multistage Interconnection Networks (OMINs) are capable of transmitting terabits of bandwidth per second, and they have been considered as possible solutions to the electronic communications bottleneck in interconnection networks. A novel architecture, the Data Vortex (DV) switch, has been proposed by Yang et al., as a scalable, ultra low latency, ultra high capacity, high throughput, low cross-talk and low BER, all-optical packet switching fabric that is a suitable candidate for use as an OMIN. For any interconnection network, its fault tolerance and reliability are crucial issues, which have lacked attention up to now in the case for a DV switch. In this paper we, therefore, present results of fault tolerance and reliability analysis of the primary DV switch, and propose (1) a new Augmented Data Vortex (ADV) switch fabric, to improve the fault tolerance of the primary DV switch. (2) The labelling and a numbering scheme, with detailed interconnections of nodes for the ADV switch is given. (3) A new self-routing procedure and a priority scheme for distributed control signalling in the ADV switch have been given. (4) For the first time, conversion of the 3-dimensional switch to an equivalent chained-MIN model, has been given, which is more suitable for later analysis of fault tolerance. (5) A multiplexing scheme at input ports and output ports which further enhances the fault tolerance of the ADV switch has been given. (6) Computation has been done of the reliability and fault tolerance of the new architecture via an analytical model. (7) Finally, comparison of the ADV switch architecture with the primary architecture (DV) in view of fault tolerance and reliability has been given, and hardware complexity and cost effectiveness have been studied.