The DSP bottleneck

Authors:
R. Baines
Affiliations:
Commun. Div., Analog Devices Inc., Norwood, MA
Venue:
IEEE Communications Magazine
Year:
1995

Citing 0
Cited 4

Low Power Digital Frequency Conversion Architectures

Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
Rapid prototyping for wireless designs: the five-ones approach

Signal Processing - From signal processing theory to implementation
Computationally efficient algorithm for reducing the complexity of software radio receiver's filter bank

Digital Signal Processing
A random perturbation-based scheme for pairwise key establishment in sensor networks

Proceedings of the 8th ACM international symposium on Mobile ad hoc networking and computing

Quantified Score

Hi-index	0.25

Visualization

Abstract

The stumbling blocks in development of a commercially usable software radio have been the availability of hardware, in particular the fast DSP required. As high performance ADCs have become available commercially, with the sample rates and spurious free dynamic ranges required, hybrid techniques using specialized digital hardware, operating under software control, have become more common