Metal-oxide-semiconductor field-effect transistors
RF and microwave semiconductor device handbook
A new approach to sizing analog CMOS building blocks using pre-compiled neural network models
Analog Integrated Circuits and Signal Processing
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In this paper, we present a small-signal model for an integrated MOS transistor which takes into account the distributed nature of the gate structure. The y parameters are derived, as well as an equation for an equivalent current noise source at the output. The equivalent current noise source takes into account the thermal noise generated by the resistive gate. The modeling equations are of relatively simple form, allowing for easy implementation into a circuit simulation CAD tool. The model is particularly useful in the design of RF integrated circuits. The proposed model is verified using results obtained from HSPICE