Design of minimum and uniform bipartites for optimum connection blocks of FPGA

  • Authors:
  • K. Fujiyoschi;Y. Kajitani;H. Niitsu

  • Affiliations:
  • Dept. of Electr. & Electron. Eng., Tokyo Univ. of Agric. & Technol.;-;-

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2006

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Abstract

The design of optimum connection blocks of field programmable gate arrays (FPGA's) in number and in distribution of switches is formulated as a bipartite graph design problem and solved. A bipartite with vertex sets R and L (|R|⩽|L|) is called totally perfect if there is a perfect matching from Ls to R for any Ls⊂L with |Ls|⩽|R|. The difference of maximum and minimum degrees of the vertices in L or R is called the skew of the respective vertex set. The problem is to construct a minimum totally perfect bipartite graph with the minimum skew. The result shows that a method, biscattering, can construct such a matrix in O(|R|×|L|) time where the lower bound is attained for both skews. This construction also solves the problem of designing optimum direct-concentrators