Practical considerations for passive reduction of RLC circuits
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Krylov subspace techniques for reduced-order modeling of large-scale dynamical systems
Applied Numerical Mathematics
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
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Recently, there has been a great deal of interest in using the Pade Via Lanczos (PVL) technique to analyze the transfer functions and impulse responses of large-scale linear circuits. In this paper, a matrix-based derivation of the error between the original circuit transfer function and the reduced-order transfer function generated using the PVL technique is presented. This error measure may be used for the development of an automated termination of the Lanczos process in the PVL technique and achieve the desired accuracy of the approximate transfer function. PVL coupled with such an error bound will be referred to as the PVL-WEB algorithm