A New Low-Power 13.56-MHz CMOS Ring Oscillator with Low Sensitivity of fOSC to VDD
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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This report describes a successful simulation using HSPICE and comparison with published data of the phase noise on a 2-GHz CMOS inductance-capacitance (LC) oscillator caused by low-frequency flicker noise (1/f noise). The flicker noise, which is determined by measurements on NMOSFETs, is simulated as a sum of sine waves with random phase by using MATLAB, and is finally introduced into the LC oscillator circuit as an HSPICE piecewise linear waveform. The output of LC oscillator in HSPICE is written as a series of points equally spaced in time and then the spectrum is computed by fast Fourier transform (FFT). The simulation results show the phase noise of the voltage-controlled oscillator with different noise coefficient (KF) values in the SPICE models, and demonstrate that the phase noise caused by low-frequency flicker noise has a 1/f3 dependence on the offset frequency. The simulated sideband power spectral density corresponds to the measured values reported in the literature