Generic sub-space algorithm for generating reduced order models of linear time varying vlsi circuits
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Proceedings of the 2nd international conference on Nano-Networks
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Accurate simulation of large interconnect networks has become a necessity to address signal integrity issues in high-speed designs. Recently, several model-reduction techniques based on Krylov-space methods have been proposed for efficient simulation of large linear networks, However, these methods treat the distributed networks in terms of their lumped representations. In order to overcome this difficulty, a new technique based on congruent transformation is presented in this paper to directly include distributed systems described by Telegrapher's partial differential equations,