A design methodology for application-specific networks-on-chip
ACM Transactions on Embedded Computing Systems (TECS)
Analog placement based on hierarchical module clustering
Proceedings of the 45th annual Design Automation Conference
| Hi-index | 0.03 |
In floorplan design, it is useful to allow users to specify some placement constraints in the final packing. Clustering constraint is a popular type of placement constraint in which a given set of modules are restricted to be placed adjacent to one another. The wiring cost can be reduced by placing modules with a lot of interconnections closely together. Designers may also need this type of constraint to restrict the positions of some modules according to their functionalities. In this paper, a method addressing clustering constraint in slicing floorplan is presented. We devised a linear time algorithm to locate neighboring modules in a normalized Polish expression and to rearrange them to satisfy the given constraints. Experiments were performed on some benchmarks and the results are very promising.