Algorithms for permutation channel routing
Integration, the VLSI Journal
iCOACH: A circuit optimization aid for CMOS high-performance circuits
Integration, the VLSI Journal
Equidistance routing in high-speed VLSI layout design
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
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YACR2 is a channel router that minimizes the number of through vias in addition to the area used to complete the routing in a two-layer channel. It can route channels with cyclic constraints and uses a virtual grid. YACR2 uses preferably one layer for the horizontal segments of the nets and the other for the vertical ones but it may require the routing of a few horizontal segments in the second layer. Experimentally YACR2 performs better than any of the channel routers proposed thus far both in terms of area used and through vias. It routed the Deutsch Difficult Example in density with substantially less vias than Burstein's hierarchical router and with the default parameter values in less than 3 s of CPU time on a VAX 11/780.