Simulated Annealing Without Rejected Moves

Authors:
J. W. Greene;K. J. Supowit
Affiliations:
-;-
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2006

Citing 0
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Abstract

The customary need for rejection of candidate moves in simulated annealing is eliminated by biasing the selection of moves according to their effect on the cost function. An efficient implementation can offer a significant speed-up, though with increased memory. The logic partitioning problem is used as an illustration; both simple moves and pairwise interchanges are considered.