Parallel implementations of the statistical cooling algorithm
Integration, the VLSI Journal
Performance of a parallel algorithm for standard cell placement on the Intel hypercube
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Simulated Annealing Without Rejected Moves
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Placement by Simulated Annealing on a Multiprocessor
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper proposes a parallel annealing algorithm, called stepwise-overlapped annealing, that can be efficiently implemented to a multiprocessor system with a large number of processors such as hypercube computers. It is an improved algorithm of the systolic annealing that was proposed by Aarts et al. [8]. We introduce modifications for correcting the temperature decrement strategy and also enhance the communication pattern. Instead of the temperature decrement at each subchain, it calculates the temperature decrement at the start of each Markov chain with the standard deviation of a complete Markov chain previously processed. It is based on an annealing schedule of polynomial time complexity. Experimental results show high efficiencies even when a large number of processors are used. The merit of this parallel annealing algorithm is a simple communication pattern and thus less communication overhead. This parallel annealing algorithm can also effectively replace the high temperature region of the application-dependent parallel simulated annealing algorithms.