Computational complexity analysis of determinant decision diagram
IEEE Transactions on Circuits and Systems II: Express Briefs
Performance bound analysis of analog circuits considering process variations
Proceedings of the 48th Design Automation Conference
A simple implementation of determinant decision diagram
Proceedings of the International Conference on Computer-Aided Design
A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits
Analog Integrated Circuits and Signal Processing
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Efficient algorithms are presented to generate approximate expressions for transfer functions and characteristics of large linear-analog circuits. The algorithms are based on a compact determinant decision diagram (DDD) representation of exact transfer functions and characteristics. Several theoretical properties of DDDs are characterized, and three algorithms, namely, based on dynamic programming, based on consecutive k-shortest path (SP), and based on incremental k-SP, are presented in this paper. We show theoretically that all three algorithms have time complexity linearly proportional to |DDD|, the number of vertices of a DDD, and that the incremental k-SP-based algorithm is fastest and the most flexible one. Experimental results confirm that the proposed algorithms are the most efficient ones reported so far, and are capable of generating thousands of dominant terms for typical analog blocks in CPU seconds on a modern computer workstation.