MOS table models for circuit simulation

  • Authors:
  • V. Bourenkov;K. G. McCarthy;A. Mathewson

  • Affiliations:
  • Tyndall Nat. Inst., Cork, Ireland;-;-

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2006

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Abstract

Compact MOSFET models for circuit simulation face several competing requirements, such as fast execution times, good accuracy and small memory requirements. This paper describes novel interpolation methods for accurate evaluation of MOSFET characteristics in weak, moderate, and strong inversion regions. These methods form the basis of a new table look-up model implemented in SPICE3F5. The table model provides great flexibility in adjustment of the simulation accuracy, speed, and memory consumption by providing a choice of interpolations and data tables. Application of the model to circuit simulation gives very accurate results in dc, transient, and ac analyses.